ADuC7060
Primary Channel ADC Data Register
Table 48. ADC1DAT MMR Bit Designations
Name:
Address:
ADC0DAT
0xFFFF051C
Bits
23 to 0
Description
ADC1 24-bit conversion result
Primary Channel ADC Offset Calibration Register
Default value:
Access:
Function:
0x00000000
Read only
This ADC data MMR holds the 24-/16-bit
conversion result from the primary ADC. The
ADC does not update this MMR if the ADC0
conversion result ready bit (ADCSTA[0]) is
set. A read of this MMR by the MCU clears all
asserted ready flags (ADCSTA[2:0]).
Name:
Address:
Default value:
Access:
Function:
ADC0OF
0xFFFF0524
Part specific, factory programmed
Read and write
This ADC offset MMR holds a 16-bit offset
calibration coefficient for the primary ADC.
The register is configured at power-on with a
Table 47. ADC0DAT MMR Bit Designations
factory default value. However, this register
automatically overwrites if an offset
Bits
23 to 0
Description
ADC0 24-bit/16-bit conversion result
calibration of the primary ADC is initiated by
the user via bits in the ADCMDE MMR. User
code can write to this calibration register only
Auxiliary Channel ADC Data Register
if the ADC is in idle mode. An ADC must be
Name:
Address:
Default value:
ADC1DAT
0xFFFF0520
0x00000000
enabled and in idle mode before being
written to any offset or gain register. The
ADC must be in idle mode for at least 23 μs.
Table 49. ADC0OF MMR Bit Designations
Access:
Function:
Read only
This ADC data MMR holds the 24-bit
Bits
15 to 0
Description
ADC0 16-bit calibration offset value
conversion result from the auxiliary ADC.
The ADC does not update this MMR if the
Auxiliary Channel ADC Offset Calibration Register
ADC0 conversion result ready bit
(ADCSTA[1]) is set. A read of this MMR by
the MCU clears all asserted ready flags
(ADCSTA[2:1]).
Name:
Address:
Default value:
Access:
Function:
ADC1OF
0xFFFF0528
Part specific, factory programmed
Read and write
This offset MMR holds a 16-bit offset
calibration coefficient for the auxiliary
channel. The register is configured at power-
on with a factory default value. However, this
register is automatically overwritten if an
offset calibration of the auxiliary channel is
initiated by the user via bits in the ADCMDE
MMR. User code can write to this calibration
register only if the ADC is in idle mode. An
ADC must be enabled and in idle mode
before being written to any offset or gain
register. The ADC must be in idle mode for
at least 23 μs.
Rev. 0 | Page 45 of 100
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